This DigImage facility provides simple real-time manipulations of images during acquisition using the onboard arithmetic logic unit (ALU). The arithmetic logic unit (ALU) which is an integral part of the Data Translation frame grabber is capable of a number of simple arithmetic and logic operations. The ALU has two input arms, labelled "A" and "B". Eight bit intensity information is produced by the analog to digital converter (A/D) and is presented, via the input lookup table (ILUT), to the "A" arm of the ALU. Similarly eight bit intensity information is transferred from a specified frame buffer to the "B" arm of the ALU. Note that the "B" arm is not translated by a lookup table. The two eight bit inputs to the ALU are combined in the selected manner to produce a nine bit result. This nine bit result is then mapped onto eight bit space through the selected result lookup table (RLUT). The full range of such ALU operations by specifying the buffers, look up tables and ALU operations are supported (zoom and pan on the "B" mask buffer are not supported).
{If mask buffer -1 specified}
{If mask buffer -1 specified}
ALU Operations: This input specifies the ALU operation to be used during the acquisition process. The ALU operations are divided into logical operations and two classes of arithmetic operations. The two classes of arithmetic operations vary in how the CARRYIN register on the frame grabber card is set. A list of the 48 operations is given below:
Logical Arithmetic with carry
0 nA 16 A 32 A + 1
1 n(A or B) 17 A or B 33 (A or B) + 1
2 nA and b 18 A or nB 34 (A or nB) + 1
3 0 19 -1 35 zero
4 n(A and B) 20 A + (A and nB) 36 A+(A and nB)+1
5 nB 21 (A or B)+(A and nB) 37 (A or B)+(A and nB)+1
6 A xor B 22 A - B - 1 38 A - B
7 A and nB 23 (A or nB) - 1 39 A and nB
8 nA 24 A + (A and B) 40 A+(A and B)+1
9 n(A xor B) 25 A + B 41 A + B + 1
10 B 26 (A or nB)+(A and B) 42 (A or nB)+(A and B)+1
11 A and B 27 (A and B) - 1 43 A and B
12 1 28 A + A 44 A + A + 1
13 A or nB 29 (A or B) + A 45 (A or B)+A+1
14 A or B 30 (A or nB) + A 46 (A or nB)+A+1
15 A 31 A - 1 47 A
Note that nA and nB are the logical compliments of A and B, respectively. Addition operations (+) produce results between 0 and 511 as expected from adding two eight bit values. The subtraction operations (22 and 38) produce values between 256 and 511 for positive results, and between 0 and 255 for negative results.
Select Input Look Up Table The digitized eight bit signal produced by the A/D converter is applied to input "A" via input look up table (ILUT). A number of simple manipulations may be performed using this table. Details on those available are given by the 'H' Help option within the Select Input Look Up Table submenu.
Select Result Look Up Table The nine bit signal output from the ALU must be mapped onto eight intensity bits. This is achieved by passing the ALU output through the 512 elements of the Result Look Up Table (RLUT), each element containing an eight bit value. The mapping may perform simple arithmetic operations in its own right. Details on the RLUTs available are given by the 'H' Help option within the Select Result Look Up Table submenu.
{If mask buffer -1 specified}
{If mask buffer -1 not specified}